1. Field of the Invention
The present invention relates to a register access processing method for use with an information processing apparatus having an architecture of a register window and using an out-of-order instruction execution system, the method allowing the order of instructions to be changed so that an instruction goes ahead of a register window switching instruction.
2. Description of the Related Art
Some information processing apparatus having an architecture using a reduced instruction set has a plurality of register sets (hereinafter referred to as register windows). Thus, in the apparatus, it is not necessary to save or restore to a memory stack a register that takes place when a subroutine is called or returned.
The register windows are connected in a ring shape and managed by register window numbers (hereinafter referred to as window numbers). For example, eight register windows are assigned window numbers 0 to 7 and used in the order of 0, 1, 2, . . . , and 7. The window number of a register window that is being used is stored by a register (hereinafter, this register is referred to as current window pointer (CWP)).
FIG. 1 shows the structure of a ring-shaped register file.
Each register window file composed of for example 32 64-bit registers. Among these registers, eight registers are common in all the register windows. As shown in FIG. 1, other eight registers are in common with the immediately preceding register window. Further eight registers are in common with the immediately following register window.
These registers are referred to as overlap register window. There are two types of register window switching instructions that are a SAVE instruction and a RESTORE instruction. The SAVE instruction increments CWP. The RESTORE instruction decrements CWP. Thus, in the following description, the register window switching instructions are referred to as SAVE instruction and RESTORE instruction.
FIG. 1 shows the case that the number n of windows is eight and a total of 136 registers of which eight “local” registers×eight windows=64 registers, eight overlapped in/out registers×eight windows=64 registers, and eight global registers (not shown). It is necessary to allow data to be written and read to and from all the registers.
In the related art, there are problem with respect to speed and scale of a circuit that reads data from such a large register file.
FIG. 2 is a schematic diagram showing the structure of a register file composed of a master register file and a working register file.
As the number of register windows becomes large, a very large register file is required (when the number of register windows is eight, 136 registers are required). As a result, it becomes difficult to supply an operand to an arithmetic unit at high speed. Thus, as shown in FIG. 2, in addition to a register file (portion (51) shown in FIG. 2) that stores all windows as shown in FIG. 2 (the register file is referred to as master register file (MRF)), a subset (portion (52) shown in FIG. 2 (52)) of the MRF is disposed. The subset stores a copy of one window pointed by CWP in the MRF (hereinafter, the subset is referred to as working register file (WRF)). The WRF supplies an operand to the arithmetic unit. Since the WRF stores only a window pointed by CWP, the capacity of the WRF is 32 entries that is smaller than that of the MRF. Thus, data can be read from the WRF at high speed.
However, in such a structure, since the WRF stores only registers for one window, when the SAVE instruction or the RESTORE instruction is executed, an operand that is required after an instruction that will be executed after the SAVE instruction or the RESTORE instruction cannot be supplied from the WRF.
Thus, when the SAVE instruction or the RESTORE instruction is executed, since the window of the WRF is replaced with a new window, since a window transferring process takes place from the MRF to the WRF, while the process is taking place, the execution of instructions that follow is stalled.
In addition, the information processing apparatus that changes the processing order of instructions corresponding to an out-of-order instruction executes the instructions that can be processed regardless of the execution order of the program. However, the apparatus cannot execute an instruction preceded by the SAVE instruction or the RESTORE instruction even if the apparatus can process the instruction, until a window is transferred to the WRF after the SAVE instruction or the RESTORE instruction is executed.
Such a restriction causes the performance of the information processing apparatus corresponding to the out-of-order instruction execution system that generates a large number of instructions at a time to largely deteriorate. The information processing apparatus corresponding to the out-of-order instruction execution system pre-reads many instructions and pre-stores them to buffers. Instructions that are stored and that are executable are executed in the changed order different from that designated by the program so that the throughput of the execution of the instructions is improved. Thus, when the SAVE instruction or the RESTORE instruction is executed, if the execution order of instructions cannot be changed, whenever the SAVE instruction or the RESTORE instruction is executed, the out-of-order processing mechanism does not work. As a result, the performance of the apparatus remarkably deteriorates.